Sfoglia per Autore VALENTE, GIACOMO
Hardware Mechanisms to Support Profiling in Many-Core Embedded Systems
2014-01-01 Pomante, L; Tieri, C.; Federici, F.; Colizza, Maurizio; Faccio, M.; Valente, G.
Enhancing an FPGA-Based SMP Embedded Platform with OpenMP Support and Unobtrusive System Monitor
2015-01-01 Muttillo, (IC. 55) V.; Federici, F.; Pomante, L.; Valente, G.; Faccio, M.; Tieri, C.
Exploiting Paravirtualization to Support Time and Space Isolation in Multi-Core Platforms for the Avionic Domain
2015-01-01 Casalena, (IC. 56) D.; Federici, F.; Pomante, L.; Valente, G.; Andreetti, D.; Pascucci, D.
WHICH: Watch over Heterogeneous Multicore ICs to Diagnose Harmful Stalls
2015-01-01 Pomante, L.; Federici, F.; Valente, G.; Muttillo, V.; Moro, A.
4-LOOP: 4-core Leon3 with Linux operating system, OpenMP library and hardware profiling system
2015-01-01 Valente, G.; Muttillo, V.; Federici, F.; Faccio, M.; Pomante, L.
Hardware performance sniffers for embedded systems profiling
2015-01-01 Moro, A.; Federici, F.; Valente, G.; Pomante, L.; Faccio, M.; Muttillo, V.
A framework for integrated monitoring of real-time embedded SoC
2015-01-01 Valente, Giacomo
A Model-Based ESL HW/SW Co-Design Framework for Mixed Criticality Systems
2016-01-01 Federici, F.; Muttillo, V.; Pomante, L.; Serri, P.; Valente, G.
AIPHS: AdaptIve Profiling Hardware Sub-system
2016-01-01 Pomante, L.; Valente, G.; Bufalino, A.; Muttillo, V.; Faccio, M.; Federici, F.
A-LOOP - AMP system: 2-cores ARM Cortex A9/Linux OS and 4-cores Leon3/Linux OS, OpenMP library and Hardware Profiling system
2016-01-01 Pomante, L.; Valente, G.; Muttillo, V.; Bufalino, A.; Faccio, M.; Federici, F.
Implementing mixed-critical applications on next generation multicore aerospace platforms
2016-01-01 Federici, F.; Muttillo, V.; Pomante, L.; Valente, G.; Andreetti, Danilo; Pascucci, D.
Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints
2016-01-01 Faccio, M.; Federici, F.; Marini, G.; Muttillo, V.; Pomante, L.; Valente, G.
A Flexible Profiling Sub-System for Reconfigurable Logic Architectures
2016-01-01 Valente, Giacomo; Muttillo, Vittoriano; Pomante, L.; Federici, F.; Faccio, M.; Moro, A.; Ferri, S.; Tieri, C.
F-OMP: A Feedback monitoring infrastructure for OpenMP on embedded systems
2017-01-01 Pomante, L.; Valente, G.; Faccio, M.; Muttillo, V.
A System-Level Methodology for HW/SW Co-Design of Heterogeneous Parallel Dedicated Systems
2017-01-01 Pomante, L.; Valente, G.; Muttillo, V.; Incerto, E.; Di Pompeo, D.; Ciambrone, L.
Simulation-Based Analysis of a Hardware Mechanism to Support Isolation in Mixed-Criticality Network on Chip
2017-01-01 Federici, Fabio; Micozzi, Mattia; Muttillo, V.; Pomante, L.; Valente, Giacomo
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system
2017-01-01 Muttillo, V.; Valente, G.; Federici, F.; Pomante, L.; Faccio, M.; Tieri, C.; Ferri, S.
An efficient performance-driven approach for HW/SW Co-design
2017-01-01 Di Pompeo, D.; Incerto, E.; Muttillo, V.; Pomante, L.; Valente, G.
Time Bands: A Software Approach for Timing Analysis on Resource Constrained Systems
2017-01-01 Valente, Giacomo; Rotondi, Marco; Muttillo, Vittoriano
CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies
2017-01-01 Muttillo, V.; Valente, G.; Stoico, V.; D’Antonio, F.; Pomante, L.
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
Hardware Mechanisms to Support Profiling in Many-Core Embedded Systems | 1-gen-2014 | Pomante, L; Tieri, C.; Federici, F.; Colizza, Maurizio; Faccio, M.; Valente, G. | |
Enhancing an FPGA-Based SMP Embedded Platform with OpenMP Support and Unobtrusive System Monitor | 1-gen-2015 | Muttillo, (IC. 55) V.; Federici, F.; Pomante, L.; Valente, G.; Faccio, M.; Tieri, C. | |
Exploiting Paravirtualization to Support Time and Space Isolation in Multi-Core Platforms for the Avionic Domain | 1-gen-2015 | Casalena, (IC. 56) D.; Federici, F.; Pomante, L.; Valente, G.; Andreetti, D.; Pascucci, D. | |
WHICH: Watch over Heterogeneous Multicore ICs to Diagnose Harmful Stalls | 1-gen-2015 | Pomante, L.; Federici, F.; Valente, G.; Muttillo, V.; Moro, A. | |
4-LOOP: 4-core Leon3 with Linux operating system, OpenMP library and hardware profiling system | 1-gen-2015 | Valente, G.; Muttillo, V.; Federici, F.; Faccio, M.; Pomante, L. | |
Hardware performance sniffers for embedded systems profiling | 1-gen-2015 | Moro, A.; Federici, F.; Valente, G.; Pomante, L.; Faccio, M.; Muttillo, V. | |
A framework for integrated monitoring of real-time embedded SoC | 1-gen-2015 | Valente, Giacomo | |
A Model-Based ESL HW/SW Co-Design Framework for Mixed Criticality Systems | 1-gen-2016 | Federici, F.; Muttillo, V.; Pomante, L.; Serri, P.; Valente, G. | |
AIPHS: AdaptIve Profiling Hardware Sub-system | 1-gen-2016 | Pomante, L.; Valente, G.; Bufalino, A.; Muttillo, V.; Faccio, M.; Federici, F. | |
A-LOOP - AMP system: 2-cores ARM Cortex A9/Linux OS and 4-cores Leon3/Linux OS, OpenMP library and Hardware Profiling system | 1-gen-2016 | Pomante, L.; Valente, G.; Muttillo, V.; Bufalino, A.; Faccio, M.; Federici, F. | |
Implementing mixed-critical applications on next generation multicore aerospace platforms | 1-gen-2016 | Federici, F.; Muttillo, V.; Pomante, L.; Valente, G.; Andreetti, Danilo; Pascucci, D. | |
Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints | 1-gen-2016 | Faccio, M.; Federici, F.; Marini, G.; Muttillo, V.; Pomante, L.; Valente, G. | |
A Flexible Profiling Sub-System for Reconfigurable Logic Architectures | 1-gen-2016 | Valente, Giacomo; Muttillo, Vittoriano; Pomante, L.; Federici, F.; Faccio, M.; Moro, A.; Ferri, S.; Tieri, C. | |
F-OMP: A Feedback monitoring infrastructure for OpenMP on embedded systems | 1-gen-2017 | Pomante, L.; Valente, G.; Faccio, M.; Muttillo, V. | |
A System-Level Methodology for HW/SW Co-Design of Heterogeneous Parallel Dedicated Systems | 1-gen-2017 | Pomante, L.; Valente, G.; Muttillo, V.; Incerto, E.; Di Pompeo, D.; Ciambrone, L. | |
Simulation-Based Analysis of a Hardware Mechanism to Support Isolation in Mixed-Criticality Network on Chip | 1-gen-2017 | Federici, Fabio; Micozzi, Mattia; Muttillo, V.; Pomante, L.; Valente, Giacomo | |
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system | 1-gen-2017 | Muttillo, V.; Valente, G.; Federici, F.; Pomante, L.; Faccio, M.; Tieri, C.; Ferri, S. | |
An efficient performance-driven approach for HW/SW Co-design | 1-gen-2017 | Di Pompeo, D.; Incerto, E.; Muttillo, V.; Pomante, L.; Valente, G. | |
Time Bands: A Software Approach for Timing Analysis on Resource Constrained Systems | 1-gen-2017 | Valente, Giacomo; Rotondi, Marco; Muttillo, Vittoriano | |
CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies | 1-gen-2017 | Muttillo, V.; Valente, G.; Stoico, V.; D’Antonio, F.; Pomante, L. |
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