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Mostrati risultati da 1 a 20 di 38
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WHICH: Watch over Heterogeneous Multicore ICs to Diagnose Harmful Stalls 1-gen-2015 Pomante, L.; Federici, F.; Valente, G.; Muttillo, V.; Moro, A.
4-LOOP: 4-core Leon3 with Linux operating system, OpenMP library and hardware profiling system 1-gen-2015 Valente, G.; Muttillo, V.; Federici, F.; Faccio, M.; Pomante, L.
Hardware performance sniffers for embedded systems profiling 1-gen-2015 Moro, A.; Federici, F.; Valente, G.; Pomante, L.; Faccio, M.; Muttillo, V.
A Model-Based ESL HW/SW Co-Design Framework for Mixed Criticality Systems 1-gen-2016 Federici, F.; Muttillo, V.; Pomante, L.; Serri, P.; Valente, G.
AIPHS: AdaptIve Profiling Hardware Sub-system 1-gen-2016 Pomante, L.; Valente, G.; Bufalino, A.; Muttillo, V.; Faccio, M.; Federici, F.
A-LOOP - AMP system: 2-cores ARM Cortex A9/Linux OS and 4-cores Leon3/Linux OS, OpenMP library and Hardware Profiling system 1-gen-2016 Pomante, L.; Valente, G.; Muttillo, V.; Bufalino, A.; Faccio, M.; Federici, F.
Implementing mixed-critical applications on next generation multicore aerospace platforms 1-gen-2016 Federici, F.; Muttillo, V.; Pomante, L.; Valente, G.; Andreetti, Danilo; Pascucci, D.
A Flexible Profiling Sub-System for Reconfigurable Logic Architectures 1-gen-2016 Valente, Giacomo; Muttillo, Vittoriano; Pomante, L.; Federici, F.; Faccio, M.; Moro, A.; Ferri, S.; Tieri, C.
Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints 1-gen-2016 Faccio, M.; Federici, F.; Marini, G.; Muttillo, V.; Pomante, L.; Valente, G.
F-OMP: A Feedback monitoring infrastructure for OpenMP on embedded systems 1-gen-2017 Pomante, L.; Valente, G.; Faccio, M.; Muttillo, V.
Analysis and design of a Command & Data Handling platform based on the LEON4 multicore processor and PikeOS hypervisor 1-gen-2017 Andreetti, D; Federici, F; Muttillo, V; Pascucci, D; Pomante, L
A System-Level Methodology for HW/SW Co-Design of Heterogeneous Parallel Dedicated Systems 1-gen-2017 Pomante, L.; Valente, G.; Muttillo, V.; Incerto, E.; Di Pompeo, D.; Ciambrone, L.
CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies 1-gen-2017 Muttillo, V.; Valente, G.; Stoico, V.; D’Antonio, F.; Pomante, L.
HW/SW Co-Simulator for Embedded Heterogeneous Parallel Systems 1-gen-2017 Muttillo, V.; Valente, G.; Ciambrone, D.; Pomante, L.
Time Bands: A Software Approach for Timing Analysis on Resource Constrained Systems 1-gen-2017 Valente, Giacomo; Rotondi, Marco; Muttillo, Vittoriano
An efficient performance-driven approach for HW/SW Co-design 1-gen-2017 Di Pompeo, D.; Incerto, E.; Muttillo, V.; Pomante, L.; Valente, G.
Simulation-Based Analysis of a Hardware Mechanism to Support Isolation in Mixed-Criticality Network on Chip 1-gen-2017 Federici, Fabio; Micozzi, Mattia; Muttillo, V.; Pomante, L.; Valente, Giacomo
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system 1-gen-2017 Muttillo, V.; Valente, G.; Federici, F.; Pomante, L.; Faccio, M.; Tieri, C.; Ferri, S.
Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements 1-gen-2018 Muttillo, Vittoriano; Valente, Giacomo
Criticality-driven design space exploration for mixed-criticality heterogeneous parallel embedded systems 1-gen-2018 Muttillo, V.; Valente, G.; Pomante, L.
Mostrati risultati da 1 a 20 di 38
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