Sfoglia per Autore
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system
2017-01-01 Muttillo, V.; Valente, G.; Federici, F.; Pomante, L.; Faccio, M.; Tieri, C.; Ferri, S.
Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements
2018-01-01 Muttillo, Vittoriano; Valente, Giacomo
HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems
2018-01-01 Ciambrone, D.; Muttillo, V.; Pomante, L.; Valente, G.
CC4CS: An off-the-shelf unifying statement-level performance metric for HW/SW technologies
2018-01-01 Muttillo, V.; Stoico, Vincenzo; Valente, G.; CASO D'ANTONIO, Fabio; Pomante, L.; Salice, F.
Hepsycode-RT: A real-time extension for an ESL HW/SW Co-design methodology
2018-01-01 Muttillo, V.; Valente, G.; Ciambrone, D.; Stoico, Vincenzo; Pomante, L.
Design space exploration for mixed-criticality embedded systems considering hypervisor-based SW Partitions
2018-01-01 Muttillo, V.; Valente, G.; Pomante, L.
Criticality-driven design space exploration for mixed-criticality heterogeneous parallel embedded systems
2018-01-01 Muttillo, V.; Valente, G.; Pomante, L.
Criticality-aware design space exploration for mixed-criticality embedded systems
2018-01-01 Pomante, L.; Muttillo, V.; Valente, G.
MECO: An Autonomic Manager For Edge-Computing Platforms
2019-01-01 D'Andrea, Gabriella; DI MASCIO, Tania; Pomante, Luigi; Valente, Giacomo
A lightweight , hardware-based support for isolation in mixed-criticality Network-on-Chip architectures
2019-01-01 Valente, Giacomo; Giammatteo, Paolo; Muttillo, Vittoriano; Pomante, Luigi; DI MASCIO, Tania
SPOF—Slave Powerlink on FPGA for Smart Sensors and Actuators Interfacing for Industry 4.0 Applications
2019-01-01 Valente, Giacomo; Muttillo, Vittoriano; Muttillo, Mirco; Barile, Gianluca; Leoni, Alfiero; Tiberti, Walter; Pomante, Luigi
Self-adaptive loop for CPSs: is the Dynamic Partial Reconfiguration profitable?
2019-01-01 D'Andrea, G.; Di Mascio, T.; Valente, G.
Run-Time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow
2020-01-01 Muttillo, V; Valente, G.; Pomante, L.; Posadas, H.; Merino, J.; Villar, E.
An ESL Methodology for HW/SW Co-Design of Monitorable Embedded Systems: The 'Design for Monitorability' Project-Work-in-Progress
2020-01-01 Valente, G.; Di Mascio, T.; Pomante, L.; Stoico, V.
Dynamic Partial Reconfiguration Profitability for Real-Time Systems
2020-01-01 Valente, Giacomo; DI MASCIO, Tania; D'Andrea, Gabriella; Pomante, Luigi
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project
2020-01-01 Pomante, L.; Palumbo, F.; Rinaldi, C.; Valente, G.; Sau, ; C., and Fanni; T., and Linden; F. V. D., and Basten; T., and Geilen; M., and Peeren; G., and Kadlec; J., and Jaaskelainen; P., and Martinez; M., and Saarinen; J., and Santti; T., and Zedda; M. K., and Sanchez; V., and Goswami; D., and Al-Ars; Z., and Beer; A., D.
Layering the monitoring action for improved flexibility and overhead control: work-in-progress
2020-01-01 Valente, Giacomo; Fanni, Tiziana; Sau, Carlo; DI BATTISTA, Francesco
An Intelligent Informative Totem Application Based on Deep CNN in Edge Regime
2020-01-01 Giammatteo, Paolo; Valente, Giacomo; D'Ortenzio, Alessandro
Work-In-Progress: Cyber-Physical Systems and Dynamic Partial Reconfiguration Scalability: opportunities and challenges
2020-01-01 D'Andrea, Gabriella; Valente, Giacomo
A Composable Monitoring System for Heterogeneous Embedded Platforms
2021-01-01 Valente, G.; Fanni, T.; Sau, C.; Di Mascio, T.; Pomante, L.; Palumbo, F.
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