In this work we present an IC architecture for RF energy harvesting. The system has been designed with a 0.18μm CMOS SMIC technology and optimized at 900MHz. Simulation results have confirmed that the integrated system handles an incoming power typically ranging from-25 dBm to 20 dBm by rectifying the variable input signals into a DC voltage source with an overall efficiency up to 50%. The chip area estimation for the proposed system is as low as 3x3mm.
|Titolo:||An IC architecture for rf energy harvesting systems|
|Autori interni:||PANTOLI, LEONARDO|
|Data di pubblicazione:||2017|
|Rivista:||JOURNAL OF COMMUNICATION SOFTWARE AND SYSTEMS|
|Appare nelle tipologie:||1.1 Articolo in rivista|