In this paper, a new hybrid coupled inductor multilevel inverter (HCIMLI) is proposed. The common characteristic of the coupled inductor inverters is to provide parallel paths for the output current. Therefore, the switching devices operate in lower current rate compared to the rated output current. By this method, it is possible to use low-current switching devices for the high-current applications. The proposed topology can be developed to generate any number of output voltage levels. This allows designing the proposed topology based on the desired current rating of the switches. Moreover, increasing the number of the levels improves the quality of output voltage and current. In the proposed structure with m units, rated current of the switching devices can be reduced to 1/4m of the rated output current. In the 9-level structure of the HCIMLI, half of the switches operate in a rated current of as low as one fourth of the rated output current. The proposed topology is verified by simulation results performed in PSCAD/EMTDC software environment.

Coupled-inductor based multilevel inverter

Cecati, Carlo
2017-01-01

Abstract

In this paper, a new hybrid coupled inductor multilevel inverter (HCIMLI) is proposed. The common characteristic of the coupled inductor inverters is to provide parallel paths for the output current. Therefore, the switching devices operate in lower current rate compared to the rated output current. By this method, it is possible to use low-current switching devices for the high-current applications. The proposed topology can be developed to generate any number of output voltage levels. This allows designing the proposed topology based on the desired current rating of the switches. Moreover, increasing the number of the levels improves the quality of output voltage and current. In the proposed structure with m units, rated current of the switching devices can be reduced to 1/4m of the rated output current. In the 9-level structure of the HCIMLI, half of the switches operate in a rated current of as low as one fourth of the rated output current. The proposed topology is verified by simulation results performed in PSCAD/EMTDC software environment.
9781538604496
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11697/123864
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