This paper proposes an efficient analytical harmonic elimination procedure valid for cascaded multilevel converters having s dc sources and a number of level l = 2s+1 with s = 2 n n = 1, 2, 3, ... . This procedure eliminates n+1 harmonics and their respective multiple; this implies a very low Total Harmonic Distortion. A 9-level inverter prototype is built and experimental results are obtained. The accuracy of the presented procedure is proved by the agreement between computed and experimental results.or, is observed.
|Titolo:||Harmonic elimination procedure for cascaded multilevel inverters having a particular even number of dc sources|
BUCCELLA, CONCETTINA (Corresponding)
|Data di pubblicazione:||2018|
|Appare nelle tipologie:||4.1 Contributo in Atti di convegno|