Reducing the number of required devices has a great importance in multilevel inverters area. In view of this, a cascaded multilevel inverter structure is proffered which requires the least number of components; IGBT and driver circuits. Four separate methods (algorithms) are recommended to ascertain the values of used DC voltage resources. In this paper, comparing the recommended topology with conventional structures from different aspects is done and comparison results are discussed. Simulation results of a 13-level inverter are shown in order to validate generating all voltage levels.

A new topology of cascaded multilevel inverter with reduced number of driver circuits and IGBTs

Babaei E.;Cecati C.;Buccella C.;
2019-01-01

Abstract

Reducing the number of required devices has a great importance in multilevel inverters area. In view of this, a cascaded multilevel inverter structure is proffered which requires the least number of components; IGBT and driver circuits. Four separate methods (algorithms) are recommended to ascertain the values of used DC voltage resources. In this paper, comparing the recommended topology with conventional structures from different aspects is done and comparison results are discussed. Simulation results of a 13-level inverter are shown in order to validate generating all voltage levels.
978-1-7281-0729-5
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11697/142853
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