This work shows a new low-power and low-voltage solution for the processing of the electrical signal incoming from Silicon Photomultipliers, that are an emerging technology for physical applications. The electronic front end here proposed is based on a so-called voltage conveyor. It has been conceived to be completely integrated as a monolithic standard CMOS technology. The power consumption of the proposed solution is 700 μW being able to manage incoming pulses as short as 30 ns providing also a variable transimpedance gain up to 86 dB with an equivalent input noise of 7 nV/Hz.
|Titolo:||A New VCII Based Low-Power Low-Voltage Front-end for Silicon Photomultipliers|
|Data di pubblicazione:||2018|
|Appare nelle tipologie:||4.1 Contributo in Atti di convegno|