Suppressing the negative effects of grid voltage harmonics on the estimated frequency of a phase-locked loop (PLL) is a challenge in literature. This article proposes an easy-to-implement quadrature signal generator (QSG) to attenuate the oscillations on the estimated frequency in single-phase grid-connected inverters, which use second-order generalized integrator (SOGI)-PLL. It is shown that SOGI exerts a stronger filtering effect in generating the quadrature signal than the in-phase signal. Against this background, in this work, a modified integrator is introduced into the path of the in-quadrature signal to generate another in-phase component with much lower harmonic content. The proposed method imposes only a small computational burden on the existing SOGI-PLL compared to the previously presented methods that address the input voltage harmonic problem. Moreover, this method can work properly within the allowable range of grid voltage frequency deviations. The proposed integrator benefits from an error-decaying mechanism to overcome dc drift in pure integrators. The integrator has been designed based on theoretical equations. The validity of the proposed QSG and theoretical equations is evaluated using simulations and experimental studies. A fixed-point representation of the proposed QSG is also provided for implementation on low-cost microcontrollers.
A Straightforward Quadrature Signal Generator for Single-Phase SOGI-PLL With Low Susceptibility to Grid Harmonics
Sobhan Mohamadian
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2022-01-01
Abstract
Suppressing the negative effects of grid voltage harmonics on the estimated frequency of a phase-locked loop (PLL) is a challenge in literature. This article proposes an easy-to-implement quadrature signal generator (QSG) to attenuate the oscillations on the estimated frequency in single-phase grid-connected inverters, which use second-order generalized integrator (SOGI)-PLL. It is shown that SOGI exerts a stronger filtering effect in generating the quadrature signal than the in-phase signal. Against this background, in this work, a modified integrator is introduced into the path of the in-quadrature signal to generate another in-phase component with much lower harmonic content. The proposed method imposes only a small computational burden on the existing SOGI-PLL compared to the previously presented methods that address the input voltage harmonic problem. Moreover, this method can work properly within the allowable range of grid voltage frequency deviations. The proposed integrator benefits from an error-decaying mechanism to overcome dc drift in pure integrators. The integrator has been designed based on theoretical equations. The validity of the proposed QSG and theoretical equations is evaluated using simulations and experimental studies. A fixed-point representation of the proposed QSG is also provided for implementation on low-cost microcontrollers.Pubblicazioni consigliate
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