In this paper, a new realization of electronically tunable voltage output second-order low-pass (LP) and band-pass (BP) filter is presented. The circuit has a multiple-input single-output structure, and LP and BP outputs are provided using the same structure. One electronically variable second-generation voltage conveyor (VCII), whose impedance at the Y port can be electronically varied using a control current (I-con), two capacitors, and one resistor are used. By changing the value of I-con, the impedance value at the Y port can be electronically varied; therefore, the value of omega(0) can be tuned. This feature helps to reduce the number of passive components used. Interestingly, the LP and BP outputs are provided at the low-impedance Z port of the VCII, and there is no need for an extra voltage buffer for practical use. The circuit enjoys a simple realization consisting of only 24 MOS transistors. Simulation results using PSpice and 0.18 mu m CMOS parameters are provided. The value of omega(0) can be varied from 1.2 MHz to 1.7 MHz, while I-con varies from 0 to 50 mu A, with a power consumption variation from 244 mu W to 515 mu W.

A New Realization of Electronically Tunable Multiple-Input Single-Voltage Output Second-Order LP/BP Filter Using VCII

Safari, L;Barile, G;Ragnoli, M;Stornelli, V
2022-01-01

Abstract

In this paper, a new realization of electronically tunable voltage output second-order low-pass (LP) and band-pass (BP) filter is presented. The circuit has a multiple-input single-output structure, and LP and BP outputs are provided using the same structure. One electronically variable second-generation voltage conveyor (VCII), whose impedance at the Y port can be electronically varied using a control current (I-con), two capacitors, and one resistor are used. By changing the value of I-con, the impedance value at the Y port can be electronically varied; therefore, the value of omega(0) can be tuned. This feature helps to reduce the number of passive components used. Interestingly, the LP and BP outputs are provided at the low-impedance Z port of the VCII, and there is no need for an extra voltage buffer for practical use. The circuit enjoys a simple realization consisting of only 24 MOS transistors. Simulation results using PSpice and 0.18 mu m CMOS parameters are provided. The value of omega(0) can be varied from 1.2 MHz to 1.7 MHz, while I-con varies from 0 to 50 mu A, with a power consumption variation from 244 mu W to 515 mu W.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11697/206266
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