In this paper, a new realization of electronically controllable positive and negative floating capacitor multiplier (+/- C) is presented. The peculiarity of the presented topology is that, for the first time, it implements a floating equivalent capacitor between its two input terminals, rather than a grounded one. To achieve the best performance, we simultaneously use the advantages provided by the current conveyor and its dual circuit, the voltage conveyor. The proposed topology is resistor free and employs one dual-output second-generation voltage conveyor (VCII +/-) and one electronically tunable differential voltage current conveyor (E-DVCC) as active building blocks (ABBs) and a single grounded capacitor. The value of the simulated capacitor is controlled by means of a control voltage V-C which is used to control the current gain between X and Z terminals of E-DVCC. The circuit is free from any matching condition. A complete non-ideal analysis by considering parasitic impedances as well as non-ideal current and voltage gains of the used ABBs is presented. The proposed circuit is designed at the transistor level in 0.18 mu m and +/- 0.9 V supply voltage. Simulation results using the SPICE program show a multiplication factor ranging from +/- 10 to +/- 25.4 with a maximum error of 0.56%. As an example, the application of the achieved floating capacitor as a standard high pass filter is also included.

New Resistor-Less Electronically Controllable +/- C Simulator Employing VCII, DVCC, and a Grounded Capacitor

Safari, L;Barile, G;Stornelli, V
2022-01-01

Abstract

In this paper, a new realization of electronically controllable positive and negative floating capacitor multiplier (+/- C) is presented. The peculiarity of the presented topology is that, for the first time, it implements a floating equivalent capacitor between its two input terminals, rather than a grounded one. To achieve the best performance, we simultaneously use the advantages provided by the current conveyor and its dual circuit, the voltage conveyor. The proposed topology is resistor free and employs one dual-output second-generation voltage conveyor (VCII +/-) and one electronically tunable differential voltage current conveyor (E-DVCC) as active building blocks (ABBs) and a single grounded capacitor. The value of the simulated capacitor is controlled by means of a control voltage V-C which is used to control the current gain between X and Z terminals of E-DVCC. The circuit is free from any matching condition. A complete non-ideal analysis by considering parasitic impedances as well as non-ideal current and voltage gains of the used ABBs is presented. The proposed circuit is designed at the transistor level in 0.18 mu m and +/- 0.9 V supply voltage. Simulation results using the SPICE program show a multiplication factor ranging from +/- 10 to +/- 25.4 with a maximum error of 0.56%. As an example, the application of the achieved floating capacitor as a standard high pass filter is also included.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11697/206267
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