This paper proposes a carrier-based switching strategy for dual inverter-fed asymmetric six-phase motor drives. Unlike traditional pulse width modulation techniques for multilevel inverters, the proposed method uses a single-carrier-based PWM derived by six-phase, two-level inverter-fed, star-connected asymmetrical six-phase motor (ASPM) and is derived from traditional pulse width modulation techniques for multilevel inverters. It exploits the geometric similarity between the resultant space vector (SV) structure across the ASPM stator and the SV structure of a six-phase, two-level VSI. Proposed scheme eliminates dwell time calculation, sector identification and other multilevel SVPWM related operations, the common mode voltage across the stator windings and the net common mode voltage across the two sets of three-phase winding. Moreover, the scheme eliminates non-torque-producing auxiliary plane harmonic voltages and provides a higher stator voltage (up to double) compared to single end fed ASPM drives for a given DC source voltage. In this way, operations from a single DC source without common mode zero sequence currents circulating through the stator windings are allowed. The proposed scheme is validated by extensive MATLAB/Simulink simulations.
Carrier-Based Modulation Scheme for Dual Inverter-Fed Asymmetrical Six-Phase Drives Supplied from a Single DC Source
Prasoon Chandran Mavila;Sobhan Mohamadian;Concettina Buccella;Carlo Cecati
2024-01-01
Abstract
This paper proposes a carrier-based switching strategy for dual inverter-fed asymmetric six-phase motor drives. Unlike traditional pulse width modulation techniques for multilevel inverters, the proposed method uses a single-carrier-based PWM derived by six-phase, two-level inverter-fed, star-connected asymmetrical six-phase motor (ASPM) and is derived from traditional pulse width modulation techniques for multilevel inverters. It exploits the geometric similarity between the resultant space vector (SV) structure across the ASPM stator and the SV structure of a six-phase, two-level VSI. Proposed scheme eliminates dwell time calculation, sector identification and other multilevel SVPWM related operations, the common mode voltage across the stator windings and the net common mode voltage across the two sets of three-phase winding. Moreover, the scheme eliminates non-torque-producing auxiliary plane harmonic voltages and provides a higher stator voltage (up to double) compared to single end fed ASPM drives for a given DC source voltage. In this way, operations from a single DC source without common mode zero sequence currents circulating through the stator windings are allowed. The proposed scheme is validated by extensive MATLAB/Simulink simulations.Pubblicazioni consigliate
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