VALENTE, GIACOMO
VALENTE, GIACOMO
Dipartimento di Ingegneria e scienze dell'informazione e matematica
Sentient Spaces: Intelligent Totem Use Case in the ECSEL FRACTAL Project
2022-01-01 Caruso, Federica; Di Mascio, Tania; Frigioni, Daniele; Pomante, Luigi; Valente, Giacomo; Delucchi, Stefano; Burgio, Paolo; Frangia, Manuel Di; Paganin, Luca; Garibotto, Chiara; Vallocchia, Damiano
MONICA “On-the-Job” Technology-Enhanced Learning Environment: An Empirical Evaluation
2022-01-01 Caruso, F.; Di Mascio, T.; Peretti, S.; Pomante, L.; Valente, G.
A Composable Monitoring System for Heterogeneous Embedded Platforms
2021-01-01 Valente, G.; Fanni, T.; Sau, C.; Di Mascio, T.; Pomante, L.; Palumbo, F.
MONICA vision: An approach, a model and the interactive tools for cyber-physical systems designers
2021-01-01 Di Mascio, T.; Caruso, F.; Tarantino, L.; Valente, G.
An investigation of dynamic partial reconfiguration offloading in hard real-time systems.
2021-01-01 D'Andrea, G.; Valente, G.; Pomante, L.; Di Mascio, T.
Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project
2021-01-01 Sau, C.; Rinaldi, C.; Pomante, L.; Palumbo, F.; Valente, G.; Fanni, T.; Martinez, M.; van der Linden, F.; Basten, T.; Geilen, M.; Peeren, G.; Kadlec, J.; Jääskeläinen, P.; Bulej, L.; Barranco, F.; Saarinen, J.; Säntti, T.; Zedda, M. K.; Sanchez, V.; Nikkhah, S. T.; Goswami, D.; Amat, G.; Maršík, L.; van Helvoort, M.; Medina, L.; Al-Ars, Z.; de Beer, A.
Dynamic Partial Reconfiguration Profitability for Real-Time Systems
2020-01-01 Valente, Giacomo; DI MASCIO, Tania; D'Andrea, Gabriella; Pomante, Luigi
An ESL Methodology for HW/SW Co-Design of Monitorable Embedded Systems: The 'Design for Monitorability' Project-Work-in-Progress
2020-01-01 Valente, G.; Di Mascio, T.; Pomante, L.; Stoico, V.
Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project
2020-01-01 Pomante, L.; Palumbo, F.; Rinaldi, C.; Valente, G.; Sau, ; C., and Fanni; T., and Linden; F. V. D., and Basten; T., and Geilen; M., and Peeren; G., and Kadlec; J., and Jaaskelainen; P., and Martinez; M., and Saarinen; J., and Santti; T., and Zedda; M. K., and Sanchez; V., and Goswami; D., and Al-Ars; Z., and Beer; A., D.
Run-Time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow
2020-01-01 Muttillo, V; Valente, G.; Pomante, L.; Posadas, H.; Merino, J.; Villar, E.
Self-adaptive loop for CPSs: is the Dynamic Partial Reconguration pro table?
2019-01-01 D'Andrea, G.; Di Mascio, T.; Valente, G.
MECO: An Autonomic Manager For Edge-Computing Platforms
2019-01-01 D'Andrea, Gabriella; DI MASCIO, Tania; Pomante, Luigi; Valente, Giacomo
SPOF—Slave Powerlink on FPGA for Smart Sensors and Actuators Interfacing for Industry 4.0 Applications
2019-01-01 Valente, Giacomo; Muttillo, Vittoriano; Muttillo, Mirco; Barile, Gianluca; Leoni, Alfiero; Tiberti, Walter; Pomante, Luigi
A lightweight , hardware-based support for isolation in mixed-criticality Network-on-Chip architectures
2019-01-01 Valente, Giacomo; Giammatteo, Paolo; Muttillo, Vittoriano; Pomante, Luigi; DI MASCIO, Tania
Criticality-driven design space exploration for mixed-criticality heterogeneous parallel embedded systems
2018-01-01 Muttillo, V.; Valente, G.; Pomante, L.
HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems
2018-01-01 Ciambrone, D.; Muttillo, V.; Pomante, L.; Valente, G.
CC4CS: An off-the-shelf unifying statement-level performance metric for HW/SW technologies
2018-01-01 Muttillo, V.; Stoico, Vincenzo; Valente, G.; CASO D'ANTONIO, Fabio; Pomante, L.; Salice, F.
Design space exploration for mixed-criticality embedded systems considering hypervisor-based SW Partitions
2018-01-01 Muttillo, V.; Valente, G.; Pomante, L.
Hepsycode-RT: A real-time extension for an ESL HW/SW Co-design methodology
2018-01-01 Muttillo, V.; Valente, G.; Ciambrone, D.; Stoico, Vincenzo; Pomante, L.
Criticality-aware design space exploration for mixed-criticality embedded systems
2018-01-01 Pomante, L.; Muttillo, V.; Valente, G.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Sentient Spaces: Intelligent Totem Use Case in the ECSEL FRACTAL Project | 1-gen-2022 | Caruso, Federica; Di Mascio, Tania; Frigioni, Daniele; Pomante, Luigi; Valente, Giacomo; Delucchi, Stefano; Burgio, Paolo; Frangia, Manuel Di; Paganin, Luca; Garibotto, Chiara; Vallocchia, Damiano | |
| MONICA “On-the-Job” Technology-Enhanced Learning Environment: An Empirical Evaluation | 1-gen-2022 | Caruso, F.; Di Mascio, T.; Peretti, S.; Pomante, L.; Valente, G. | |
| A Composable Monitoring System for Heterogeneous Embedded Platforms | 1-gen-2021 | Valente, G.; Fanni, T.; Sau, C.; Di Mascio, T.; Pomante, L.; Palumbo, F. | |
| MONICA vision: An approach, a model and the interactive tools for cyber-physical systems designers | 1-gen-2021 | Di Mascio, T.; Caruso, F.; Tarantino, L.; Valente, G. | |
| An investigation of dynamic partial reconfiguration offloading in hard real-time systems. | 1-gen-2021 | D'Andrea, G.; Valente, G.; Pomante, L.; Di Mascio, T. | |
| Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project | 1-gen-2021 | Sau, C.; Rinaldi, C.; Pomante, L.; Palumbo, F.; Valente, G.; Fanni, T.; Martinez, M.; van der Linden, F.; Basten, T.; Geilen, M.; Peeren, G.; Kadlec, J.; Jääskeläinen, P.; Bulej, L.; Barranco, F.; Saarinen, J.; Säntti, T.; Zedda, M. K.; Sanchez, V.; Nikkhah, S. T.; Goswami, D.; Amat, G.; Maršík, L.; van Helvoort, M.; Medina, L.; Al-Ars, Z.; de Beer, A. | |
| Dynamic Partial Reconfiguration Profitability for Real-Time Systems | 1-gen-2020 | Valente, Giacomo; DI MASCIO, Tania; D'Andrea, Gabriella; Pomante, Luigi | |
| An ESL Methodology for HW/SW Co-Design of Monitorable Embedded Systems: The 'Design for Monitorability' Project-Work-in-Progress | 1-gen-2020 | Valente, G.; Di Mascio, T.; Pomante, L.; Stoico, V. | |
| Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project | 1-gen-2020 | Pomante, L.; Palumbo, F.; Rinaldi, C.; Valente, G.; Sau, ; C., and Fanni; T., and Linden; F. V. D., and Basten; T., and Geilen; M., and Peeren; G., and Kadlec; J., and Jaaskelainen; P., and Martinez; M., and Saarinen; J., and Santti; T., and Zedda; M. K., and Sanchez; V., and Goswami; D., and Al-Ars; Z., and Beer; A., D. | |
| Run-Time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow | 1-gen-2020 | Muttillo, V; Valente, G.; Pomante, L.; Posadas, H.; Merino, J.; Villar, E. | |
| Self-adaptive loop for CPSs: is the Dynamic Partial Reconguration pro table? | 1-gen-2019 | D'Andrea, G.; Di Mascio, T.; Valente, G. | |
| MECO: An Autonomic Manager For Edge-Computing Platforms | 1-gen-2019 | D'Andrea, Gabriella; DI MASCIO, Tania; Pomante, Luigi; Valente, Giacomo | |
| SPOF—Slave Powerlink on FPGA for Smart Sensors and Actuators Interfacing for Industry 4.0 Applications | 1-gen-2019 | Valente, Giacomo; Muttillo, Vittoriano; Muttillo, Mirco; Barile, Gianluca; Leoni, Alfiero; Tiberti, Walter; Pomante, Luigi | |
| A lightweight , hardware-based support for isolation in mixed-criticality Network-on-Chip architectures | 1-gen-2019 | Valente, Giacomo; Giammatteo, Paolo; Muttillo, Vittoriano; Pomante, Luigi; DI MASCIO, Tania | |
| Criticality-driven design space exploration for mixed-criticality heterogeneous parallel embedded systems | 1-gen-2018 | Muttillo, V.; Valente, G.; Pomante, L. | |
| HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems | 1-gen-2018 | Ciambrone, D.; Muttillo, V.; Pomante, L.; Valente, G. | |
| CC4CS: An off-the-shelf unifying statement-level performance metric for HW/SW technologies | 1-gen-2018 | Muttillo, V.; Stoico, Vincenzo; Valente, G.; CASO D'ANTONIO, Fabio; Pomante, L.; Salice, F. | |
| Design space exploration for mixed-criticality embedded systems considering hypervisor-based SW Partitions | 1-gen-2018 | Muttillo, V.; Valente, G.; Pomante, L. | |
| Hepsycode-RT: A real-time extension for an ESL HW/SW Co-design methodology | 1-gen-2018 | Muttillo, V.; Valente, G.; Ciambrone, D.; Stoico, Vincenzo; Pomante, L. | |
| Criticality-aware design space exploration for mixed-criticality embedded systems | 1-gen-2018 | Pomante, L.; Muttillo, V.; Valente, G. |