MUTTILLO, VITTORIANO

MUTTILLO, VITTORIANO  

Dipartimento di Ingegneria e scienze dell informazione e matematica  

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Titolo Data di pubblicazione Autore(i) File
4-LOOP: 4-core Leon3 with Linux operating system, OpenMP library and hardware profiling system 1-gen-2015 Valente, G.; Muttillo, V.; Federici, F.; Faccio, M.; Pomante, L.
A-LOOP - AMP system: 2-cores ARM Cortex A9/Linux OS and 4-cores Leon3/Linux OS, OpenMP library and Hardware Profiling system 1-gen-2016 Pomante, L.; Valente, G.; Muttillo, V.; Bufalino, A.; Faccio, M.; Federici, F.
AIDOaRt: AI-augmented Automation for DevOps, a Model-based Framework for Continuous Development in Cyber-Physical Systems 1-gen-2021 Eramo, Romina; Muttillo, Vittoriano; Berardinelli, Luca; Brunelière, Hugo; Gómez, Abel; Bagnato, Alessandra; Sadovykh, Andrey; Cicchetti, Antonio
AIPHS: AdaptIve Profiling Hardware Sub-system 1-gen-2016 Pomante, L.; Valente, G.; Bufalino, A.; Muttillo, V.; Faccio, M.; Federici, F.
Analysis and design of a Command & Data Handling platform based on the LEON4 multicore processor and PikeOS hypervisor 1-gen-2017 Andreetti, D; Federici, F; Muttillo, V; Pascucci, D; Pomante, L
The AQUAS ECSEL Project Aggregated Quality Assurance for Systems: Co-Engineering Inside and Across the Product Life Cycle 1-gen-2019 Pomante, L.; Muttillo, V.; Křena, B.; Vojnar, T.; Veljković, F.; Magnin, P.; Matschnig, M.; Fischer, B.; Martinez, J.; Gruber, T.
Benchmarking analysis and characterization of hypervisors for space multicore systems 1-gen-2019 Muttillo, V; Tiberi, Luca; Pomante, L; Serri, P
CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies 1-gen-2017 Muttillo, V.; Valente, G.; Stoico, V.; D’Antonio, F.; Pomante, L.
CC4CS: An off-the-shelf unifying statement-level performance metric for HW/SW technologies 1-gen-2018 Muttillo, V.; Stoico, Vincenzo; Valente, G.; CASO D'ANTONIO, Fabio; Pomante, L.; Salice, F.
Criticality-aware design space exploration for mixed-criticality embedded systems 1-gen-2018 Pomante, L.; Muttillo, V.; Valente, G.
Criticality-driven design space exploration for mixed-criticality heterogeneous parallel embedded systems 1-gen-2018 Muttillo, V.; Valente, G.; Pomante, L.
Design and validation of multi-core embedded systems under time-to-prototype and high performance constraints 1-gen-2016 Faccio, M.; Federici, F.; Marini, G.; Muttillo, V.; Pomante, L.; Valente, G.
A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system 1-gen-2017 Muttillo, V.; Valente, G.; Federici, F.; Pomante, L.; Faccio, M.; Tieri, C.; Ferri, S.
Design space exploration for mixed-criticality embedded systems considering hypervisor-based SW Partitions 1-gen-2018 Muttillo, V.; Valente, G.; Pomante, L.
An efficient performance-driven approach for HW/SW Co-design 1-gen-2017 Di Pompeo, D.; Incerto, E.; Muttillo, V.; Pomante, L.; Valente, G.
F-OMP: A Feedback monitoring infrastructure for OpenMP on embedded systems 1-gen-2017 Pomante, L.; Valente, G.; Faccio, M.; Muttillo, V.
A Flexible Profiling Sub-System for Reconfigurable Logic Architectures 1-gen-2016 Valente, Giacomo; Muttillo, Vittoriano; Pomante, L.; Federici, F.; Faccio, M.; Moro, A.; Ferri, S.; Tieri, C.
Hardware performance sniffers for embedded systems profiling 1-gen-2015 Moro, A.; Federici, F.; Valente, G.; Pomante, L.; Faccio, M.; Muttillo, V.
HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems 1-gen-2018 Ciambrone, D.; Muttillo, V.; Pomante, L.; Valente, G.
Hepsycode-MC: Electronic System-Level Methodology For Hw/Sw Co-Design Of Mixed-Criticality Embedded Systems 1-gen-2019 Pomante, Luigi; Muttillo, Vittoriano; Santic, Marco; Incerto, Emilio