MUTTILLO, VITTORIANO

MUTTILLO, VITTORIANO  

Dipartimento di Ingegneria e scienze dell'informazione e matematica  

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Titolo Data di pubblicazione Autore(i) File
SystemC-based Co-Simulation/Analysis for System-Level Hardware/Software Co-Design 1-gen-2023 Pomante, Luigi; Santic, Marco; Muttillo, Vittoriano; Valente, Giacomo
Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection 1-gen-2023 Valente, Giacomo; Muttillo, Vittoriano; Federici, Fabio; Pomante, Luigi; Mascio, Tania Di
AIDOaRt: AI-augmented Automation for DevOps, a Model-based Framework for Continuous Development in Cyber-Physical Systems 1-gen-2021 Eramo, Romina; Muttillo, Vittoriano; Berardinelli, Luca; Brunelière, Hugo; Gómez, Abel; Bagnato, Alessandra; Sadovykh, Andrey; Cicchetti, Antonio
An OpenMP Parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-processor Embedded Systems 1-gen-2020 Muttillo, V; Giammatteo, P; Fiorilli, G; Pomante, L
A Low Cost and Flexible Power Line Communication Sensory System for Home Automation 1-gen-2020 Muttillo, M.; Muttillo, V.; Pomante, L.; Pantoli, L.
Run-Time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow 1-gen-2020 Muttillo, V; Valente, G.; Pomante, L.; Posadas, H.; Merino, J.; Villar, E.
Hepsycode-MC: Electronic System-Level Methodology For Hw/Sw Co-Design Of Mixed-Criticality Embedded Systems 1-gen-2019 Pomante, Luigi; Muttillo, Vittoriano; Santic, Marco; Incerto, Emilio
HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions 1-gen-2019 Muttillo, V; Pomante, L; Balbastre, P; Simo, J; Crespo, A
SystemC-based electronic system-level design space exploration environment for dedicated heterogeneous multi-processor systems 1-gen-2019 Pomante, L; Muttillo, V; Santic, M; Serri, P
SPOF—Slave Powerlink on FPGA for Smart Sensors and Actuators Interfacing for Industry 4.0 Applications 1-gen-2019 Valente, Giacomo; Muttillo, Vittoriano; Muttillo, Mirco; Barile, Gianluca; Leoni, Alfiero; Tiberti, Walter; Pomante, Luigi
A lightweight , hardware-based support for isolation in mixed-criticality Network-on-Chip architectures 1-gen-2019 Valente, Giacomo; Giammatteo, Paolo; Muttillo, Vittoriano; Pomante, Luigi; DI MASCIO, Tania
The AQUAS ECSEL Project Aggregated Quality Assurance for Systems: Co-Engineering Inside and Across the Product Life Cycle 1-gen-2019 Pomante, L.; Muttillo, V.; Křena, B.; Vojnar, T.; Veljković, F.; Magnin, P.; Matschnig, M.; Fischer, B.; Martinez, J.; Gruber, T.
Tuning DSE for heterogeneous multi-processor embedded systems by means of a self-equalized weighted sum method 1-gen-2019 Muttillo, V.; Fiorilli, G.; Di Mascio, T.
Benchmarking analysis and characterization of hypervisors for space multicore systems 1-gen-2019 Muttillo, V; Tiberi, Luca; Pomante, L; Serri, P
Injecting hypervisor-based software partitions into Design Space Exploration activities considering mixed-criticality requirements 1-gen-2018 Muttillo, Vittoriano; Valente, Giacomo
HEPSIM: An ESL HW/SW co-simulator/analysis tool for heterogeneous parallel embedded systems 1-gen-2018 Ciambrone, D.; Muttillo, V.; Pomante, L.; Valente, G.
Criticality-aware design space exploration for mixed-criticality embedded systems 1-gen-2018 Pomante, L.; Muttillo, V.; Valente, G.
Criticality-driven design space exploration for mixed-criticality heterogeneous parallel embedded systems 1-gen-2018 Muttillo, V.; Valente, G.; Pomante, L.
Design space exploration for mixed-criticality embedded systems considering hypervisor-based SW Partitions 1-gen-2018 Muttillo, V.; Valente, G.; Pomante, L.
CC4CS: An off-the-shelf unifying statement-level performance metric for HW/SW technologies 1-gen-2018 Muttillo, V.; Stoico, Vincenzo; Valente, G.; CASO D'ANTONIO, Fabio; Pomante, L.; Salice, F.