SCHETTINO, GIUSEPPE

SCHETTINO, GIUSEPPE  

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Mathematical formulation of pulse amplitude modulation selective harmonic elimination in multilevel three phase inverters 1-gen-2022 Buccella, C.; Cimoroni, M. G.; Cecati, C.; Di Tommaso, A. O.; Nevoloso, C.; Schettino, G.
Enhanced modulation strategy for 7-level voltage waveform in asymmetrical 5-level Cascaded H-Bridge Inverters 1-gen-2022 Tommaso, A. O. D.; Miceli, R.; Nevoloso, C.; Scaglione, G.; Schettino, G.; Viola, F.; Buccella, C.; Cecati, C.; Cimoroni, G.
Recursive Selective Harmonic Elimination for Multilevel Inverters: Mathematical Formulation and Experimental Validation 1-gen-2022 Buccella, C.; Cimoroni, M.; Cecati, C.; Di Tommaso, A.; Miceli, R.; Nevoloso, C.; Schettino, G.
Experimental Evaluation of Dead-Time Impacts on the Efficiency and THD for a Three-Phase Five-Level Cascaded H-Bridge Inverter 1-gen-2022 Schettino, G.; Nevoloso, C.; Miceli, R.; Di Tommaso, A. O.; Scaglione, G.; Viola, F.; Buccella, C.; Cimoroni, M. G.
Investigation about selective harmonic elimination in unbalanced multilevel inverters 1-gen-2022 Buccella, C.; Cimoroni, M. G.; Cecati, C.; Di Tommaso, A. O.; Nevoloso, C.; Schettino, G.; Meo, S.
Experimental Comparative Analysis of Efficiency and THD for a Three-phase Five-level Cascaded H-Bridge Inverter Controlled by Several MC-PWM Schemes 1-gen-2021 Schettino, G.; Nevoloso, C.; Miceli, R.; DI Tommaso, A. O.; Scaglione, G.; Cecati, C.; Buccella, C.
Harmonic reduction in CHB 13-level inverters by PAM fundamental-frequency strategy 1-gen-2019 Buccella, C.; Cecati, C.; Cimoroni, M. G.; Miceli, R.; Schettino, G.; Castiglia, V.; Pellitteri, F.
Selective Harmonic Elimination in a 5-level single phase converter with FPGA based controller 1-gen-2018 Castiglia, V; Miceli, R; Schettino, G; Cimoroni, Mg; Buccella, C; Cecati, C
Mixed Harmonic Elimination Control for a Single-Phase 9-Level Grid-Connected Inverter 1-gen-2018 Vincenzo, Castiglia; Rosario, Miceli; Schettino, Giuseppe; Viola, F.; Buccella, Concettina; Cecati, Carlo; Gabriella Cimoroni, M.
Simulation and experimental validation of multicarrier PWM techniques for three-phase five-level cascaded H-bridge with FPGA controller 1-gen-2017 Schettino, G.; Benanti, S.; Buccella, C.; Caruso, M.; Castiglia, V.; Cecati, C.; Di Tommaso, A. O.; Miceli, R.; Romano, P.; Viola, F.