Modular multilevel cascaded converters (MMCC) prove to be well-suitable for high and medium voltage systems due to their lower cost and high-redundance design. For STATCOM, Single-Star Bridge-Cell (SSBC) topology is well-applied for its satisfactory performance and superior component count. The feasibility of the adoption of SSBC-STATCOMs relies strictly on their performance and cost-effectiveness. Theoretically, harmonics performance improves with increasing the number of levels. However, this has a direct effect on their design and hence on overall complexity and cost. Besides, when the number of levels increases, more switches are required to be parallelly controlled. Therefore, software-based microcontrollers (e.g. DSPs) show limitations in terms of I/O built-in pins as well as performance. Alternatively, field-programmable gate-arrays (FPGAs), with their parallelism capability, are suitable for implementing the control of SSBC-STATCOM which is composed of output voltage control, internal current control, and capacitor voltage balancing. Although PI regulators are commonly used for their simplicity and ease in implementation, STATCOM system is essentially nonlinear, therefore, a nonlinear controller can effectively improve performance and robustness. Hence, this work initially focuses on investigating some key factors in STATCOM design with an emphasis on their impact on the overall cost in low and medium voltage applications. Then, a backstepping nonlinear control based on Lyapunov function design is proposed to regulate the overall capacitor voltage. Besides, detailed control design and implementation of the proposed control using FPGA is discussed. Hardware set-up of 142 V 9-level SSBC-STATCOM was designed to verify the results. The performance of the proposed method under V_{dc} step change and variation of system impedance has been analyzed and results were compared with the traditional PI controller. Besides, under fault operation, the unbalanced real power within the converter phases of SSBC results in more divergence of capacitor voltages and failure of the control system which affects the safety of the devices or leads to serious system collapse. The method of Zero-sequence voltage v_{z} is utilized to balance the capacitor voltage by adding its waveform to the three-phase ac voltages of the SSBC converter. It can redistribute the active powers between the three clusters without drawing a negative sequence current. Mathematical derivation of the v_{z} using positive and negative sequence is provided and control of STATCOM is simulated with the dual synchronous current control scheme.

Progettazione e implementazione del controllo di SSBC convertitore multilivello per compensatore sincrono statico / Saif, AHMED MAJED AHMED. - (2021 May 04).

Progettazione e implementazione del controllo di SSBC convertitore multilivello per compensatore sincrono statico

SAIF, AHMED MAJED AHMED
2021-05-04T00:00:00+02:00

Abstract

Modular multilevel cascaded converters (MMCC) prove to be well-suitable for high and medium voltage systems due to their lower cost and high-redundance design. For STATCOM, Single-Star Bridge-Cell (SSBC) topology is well-applied for its satisfactory performance and superior component count. The feasibility of the adoption of SSBC-STATCOMs relies strictly on their performance and cost-effectiveness. Theoretically, harmonics performance improves with increasing the number of levels. However, this has a direct effect on their design and hence on overall complexity and cost. Besides, when the number of levels increases, more switches are required to be parallelly controlled. Therefore, software-based microcontrollers (e.g. DSPs) show limitations in terms of I/O built-in pins as well as performance. Alternatively, field-programmable gate-arrays (FPGAs), with their parallelism capability, are suitable for implementing the control of SSBC-STATCOM which is composed of output voltage control, internal current control, and capacitor voltage balancing. Although PI regulators are commonly used for their simplicity and ease in implementation, STATCOM system is essentially nonlinear, therefore, a nonlinear controller can effectively improve performance and robustness. Hence, this work initially focuses on investigating some key factors in STATCOM design with an emphasis on their impact on the overall cost in low and medium voltage applications. Then, a backstepping nonlinear control based on Lyapunov function design is proposed to regulate the overall capacitor voltage. Besides, detailed control design and implementation of the proposed control using FPGA is discussed. Hardware set-up of 142 V 9-level SSBC-STATCOM was designed to verify the results. The performance of the proposed method under V_{dc} step change and variation of system impedance has been analyzed and results were compared with the traditional PI controller. Besides, under fault operation, the unbalanced real power within the converter phases of SSBC results in more divergence of capacitor voltages and failure of the control system which affects the safety of the devices or leads to serious system collapse. The method of Zero-sequence voltage v_{z} is utilized to balance the capacitor voltage by adding its waveform to the three-phase ac voltages of the SSBC converter. It can redistribute the active powers between the three clusters without drawing a negative sequence current. Mathematical derivation of the v_{z} using positive and negative sequence is provided and control of STATCOM is simulated with the dual synchronous current control scheme.
Progettazione e implementazione del controllo di SSBC convertitore multilivello per compensatore sincrono statico / Saif, AHMED MAJED AHMED. - (2021 May 04).
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Descrizione: Design and Control Implementation of Single Star Bridge Cell Multilevel converter for Static Synchronous Compensator
Tipologia: Tesi di dottorato
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11697/167471
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